Journal Papers
Author: F. Corbera
2024
2023
2022
2021
Efficient Heterogeneous Matrix Profile on a CPU + High Performance FPGA with Integrated HBM [doi]
J.C. Romero, A. Navarro, A. Vilches, A. Rodriguez, F. Corbera, R. Asenjo
Future Generation Computer Systems,
125, December 2021, pp. 10-23
Efficiency and Productivity for Decision Making on Low-Power Heterogeneous CPU+GPU SoCs [doi]
D.A. Constantinescu, A. Navarro, F. Corbera, J.A. Fernandez-Madrigal, R. Asenjo
The Journal of Supercomputing,
77, January 2021, pp. 44-65
2020
Parallel Multiprocessing and Scheduling on the Heterogeneous Xeon+FPGA Platform [doi]
A. Rodriguez, A. Navarro, R. Asenjo, F. Corbera, R. Gran, D. Suarez, J. Nuñez-Yañez
The Journal of Supercomputing,
76, June 2020, pp. 4645-4665
2019
Exploring Heterogeneous Scheduling for Edge Computing with CPU and FPGA MPSoCs [doi]
A. Rodriguez, A. Navarro, R. Asenjo, F. Corbera, R. Gran, D. Suarez, J. Nuñez-Yañez
Journal of Systems Architecture,
98, September 2019, pp. 27-40
Heterogeneous parallel_for Template for CPU-GPU Chips [doi]
A. Navarro, F. Corbera, A. Rodriguez, A. Vilches, R. Asenjo
International Journal of Parallel Programming,
47 (2), April 2019, pp. 231-233
2018
2017
2016
Mapping Streaming Applications on Commodity Multi-CPU and GPU On-Chip Processors [doi]
A. Vilches, A. Navarro, R. Asenjo, F. Corbera, R. Gran, M. Garzaran
IEEE Transactions on Parallel and Distributed Systems,
27 (4), April 2016, pp. 1099-1115
2015
2014
Strategies for Maximizing Utilization on Multi-CPU and Multi-GPU Heterogeneous Architectures [doi]
A. Navarro, A. Vilches, F. Corbera, R. Asenjo
The Journal of Supercomputing,
70 (2), November 2014, pp 756-771
A Case Study of Different Task Implementations for Multioutput Stages in non-trivial Parallel Pipeline Applications [doi]
A. Navarro, R. Asenjo, F. Corbera, A.J. Dios, E.L. Zapata
Parallel Computing,
40 (8), August 2014, pp. 374-393
2013
2012
A Data Dependence Test based on the Projection of Paths over Shape Graphs [doi]
A. Navarro, F. Corbera, R. Asenjo, R. Castillo, E.L. Zapata
Journal of Parallel and Distributed Computing,
72 (12), December 2012, pp. 1547-1564
2011
2010
A New Moodle Module Supporting Automatic Verification of VHDL-based Assignments [doi]
E. Gutierrez, M.A. Trenas, J.R. Cozar, F. Corbera, S. Romero
Computers and Education,
54 (2), February 2010, pp. 562-577
2009
2008
2007
Detecting Loop-Carried Dependences in Programs with Dynamic Data Structures [doi]
A. Navarro, F. Corbera, A. Tineo, R. Asenjo, E.L. Zapata
Journal of Parallel and Distributed Computing,
67 (1), January 2007, pp. 47-62
2006
2005
On the Parallelization of Irregular and Dynamic Programs [doi]
O. Plata, R. Asenjo, E. Gutierrez, F. Corbera, A. Navarro, E.L. Zapata
Parallel Computing,
31 (6), June 2005, pp. 544-562
2004
A Framework to Capture Dynamic Data Structures in Pointer-Based Codes [doi]
F. Corbera, R. Asenjo, E.L. Zapata
IEEE Transactions on Parallel and Distributed Systems,
15 (2), February 2004, pp. 151-166
2003
2002
New Shape Analysis and Interprocedural Techniques for Automatic Parallelization of C Codes [doi]
F. Corbera, R. Asenjo, E.L. Zapata
International Journal of Parallel Programming,
30 (1), February 2002, pp. 37-63
2001
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